Electronic integrated circuits are provided with output pads to which external electronic circuitry is electrically connected. Output pads may provide a logic signal of "1" or "0", or an elevated or zero voltage to indicate a logic state. To overcome the impedance of the external circuitry, each pad is provided with a driver, typically in the form of a pair of FET transistors connected in series, with the junction between the two connected to the output pad, and the remote connections of the pair connected to a power line and to ground, respectively.
ICs are typically installed on a printed circuit assembly (PCA) with other components, and other circuit assemblies or devices may be connected to the PCA. The output pad may be required to drive a load remote from the IC, after transmission via metal traces on the PCA or via other conductors. The interactions of rapidly switching signals on these traces may generate an unwanted EMI problem. While rapid switching may be desirable for high speed circuit operation, this increases EMI noise. Therefore, circuits are evaluated and provided with EMI filtration components where EMI exceeds allowable levels. However, the addition of these components on the lines driven by an output pad changes the impedance of the line, which changes the requirements on the driver on the IC. For certain applications, an IC may be custom designed to have driver capabilities at each output pad precisely matched to the intended application and PCA on which it is to be installed. This would provide driving capabilities that arc adequate to overcome external impedance, yet below a level that generates excessive EMI.
However, it is impractical or cost ineffective to design an IC twice: once to prototype the system for EMI analysis, and a second time with adequate drive capabilities to accommodate EMI reduction measures. Even when computer simulations of circuit performance are adequate to predict EMI measures and design adequate drivers in a single iteration, a separate chip design is required for each product or circuit assembly on which the chip is to be used.
Existing ICs have output pads with two drivers per pad, so that a driver may be disabled during operational periods when switching noise within the IC is excessive. Such a system is disclosed in U.S. Pat. No. 5,039,878 to Anderson, the disclosure of which is incorporated herein by reference. However, such systems do not accommodate the impedance variations generated by off-chip components and simply respond to excessive noise on a ground line.
Output pad requirements increasingly may require the driving of small loads at very high speeds. These drive speeds may include running at the internal speed of the ASIC, at up to the highest clock frequency. The use of such high frequencies may worsen various of the EMI parasitic parameters, including series inductance due to the ASIC wire bonds and chip package leads, parallel capacitance to adjacent leads and ground, and mutual inductive coupling between adjacent wires and leads. At the PCA, a transmission line effect may occur, giving rise to signal reflections that may cause serious ringing at the load. Ringing may produce ground bounce, supply line bounce, and EMI. When ringing is significant, it may generate apparent multiple data transitions at the load when only a single transition between logic states has occurred at the input, generating errors.
Ringing may be exacerbated by the effect of component resonances, and when such resonant frequencies are within the range of the data rate, external damping components are required, complicating the circuit design, and possibly requiring unwanted design iterations.
Existing designs have sought to overcome ringing concerns by using larger drivers to provide a faster edge or transition rate, and to delay reading of the signal for an interval to allow ringing to damp out. However, as data rates increase, there is inadequate time between data transitions to permit ringing to damp.
The present invention overcomes the limitations of the prior art by providing an application specific integrated circuit for use with a circuit having particular electrical characteristic such as ringing or impedance. The circuit has an output pad with an output transistor having a drain connected to the output pad, and a gate connected to the drain of a predriver transistor. The output transistor has a gate-source capacitance characteristic, and the predriver transistor has a resistance that produces a time constant above a selected threshold based on the electrical characteristic. The first predriver transistor also has a selected resistance based on the predriver time constant and the gate-source capacitance characteristic, such that the first predriver is operable to switch the output transistor at a sufficiently slow rate to avoid ringing.